You just finished a board layout. The power path looks clean, the routing is tidy, and you've got a 10A trace running through an inner layer that's 10 mils wide. You send it to fab, assemble it, power it up, and — the trace lifts right off the board. Or worse, it works fine on the bench but fails in the field when ambient hits 70°C.
High-current PCB design is one of those areas where "close enough" really isn't. The math matters, the standards exist for a reason, and getting trace sizing wrong doesn't just cause electrical failures — it causes thermal failures. Let's walk through how to get this right.
Why Trace Width Isn't Just About Resistance
Most engineers think about trace width in terms of voltage drop. That's valid — a narrow, long trace carrying several amps will have meaningful IR drop. But the bigger concern is heat.
When current flows through a PCB trace, the trace acts like a resistor. It dissipates power as heat (P = I²R). The PCB has to get rid of that heat through conduction into copper planes, convection into air, and radiation. If the heat generation exceeds the heat removal, the trace temperature rises until something gives.
That "something" could be:
- The trace delaminating from the substrate (FR-4 glass transition is ~130–140°C for standard material)
- Solder joints reflowing unexpectedly
- Nearby components drifting out of spec
- In extreme cases, the copper itself fusing open
IPC-2221 gives us a framework to prevent all of this. IPC-2152 refines it with more accurate data. Let's use both.
The IPC-2221 Approach
IPC-2221 "Generic Standard on Printed Board Design" includes internal and external trace sizing charts based on current carrying capacity. The standard defines several conductor types:
| Conductor Type | Description |
|---|---|
| Internal | Traces buried in inner layers |
| External | Traces on outer layers (with or without solder mask) |
| Plane | Large copper pours and planes |
The key variable is allowable temperature rise (ΔT). You choose how much hotter than ambient your trace is allowed to get, then look up the required cross-sectional area for your current.
The formula derived from IPC-2221 charts for external traces:
I = k × (ΔT)^0.44 × A^0.725
Where:
- I = current in amps
- ΔT = temperature rise above ambient in °C
- A = cross-sectional area in square mils
- k = 0.048 for external traces, 0.024 for internal traces
Rearranging to solve for area:
A = [I / (k × ΔT^0.44)]^(1/0.725)
Worked Example: 8A External Trace with 10°C Rise
Let's say you need an external trace carrying 8A with no more than 10°C rise above ambient on 1 oz copper (1.4 mils thick).
A = [8 / (0.048 × 10^0.44)]^(1/0.725)
A = [8 / (0.048 × 2.754)]^(1/0.725)
A = [8 / 0.1322]^(1/0.725)
A = [60.51]^(1.378)
A = 249.5 sq mils
Trace width = A / copper thickness = 249.5 / 1.4 = 178 mils (about 4.5mm).
That's a wide trace. On a crowded board, that hurts. But the math doesn't lie — if you need 8A with only 10°C rise, you need that copper.
Same Example, Internal Trace
Internal traces are worse because they can't convect heat to air as easily. Using k = 0.024:
A = [8 / (0.024 × 10^0.44)]^(1/0.725)
A = [8 / 0.0661]^(1/0.725)
A = [121.0]^(1.378)
A = 647.5 sq mils
Trace width = 647.5 / 1.4 = 462 mils (11.7mm). More than double the external width. This is why high-current paths should run on outer layers whenever possible.
IPC-2152: The More Accurate Standard
IPC-2151 was released in 2009 to replace the older IPC-2221 charts (which were based on very conservative 1950s data). IPC-2152 accounts for:
- Board thickness — thinner boards dissipate heat differently
- Copper weight — the chart adjusts for 0.5 oz, 1 oz, 2 oz, etc.
- Presence of planes — a copper plane under a trace dramatically improves heat sinking
- Altitude — reduced air pressure means reduced convection
In practice, IPC-2152 generally allows smaller traces than IPC-2221 for the same current and temperature rise, because the older standard was so conservative. But IPC-2152 requires more input parameters and is harder to calculate by hand.
Practical advice: Use IPC-2221 for quick estimates and rule-of-thumb checks. Use IPC-2152 for production designs where board space is tight and you need to optimize copper area.
Quick Reference: Trace Width vs Current (1 oz, External, 10°C Rise)
| Current (A) | IPC-2221 Width (mils) | IPC-2221 Width (mm) |
|---|---|---|
| 1 | 20 | 0.5 |
| 2 | 47 | 1.2 |
| 3 | 78 | 2.0 |
| 5 | 144 | 3.7 |
| 8 | 248 | 6.3 |
| 10 | 324 | 8.2 |
| 15 | 526 | 13.4 |
| 20 | 745 | 18.9 |
These are rough numbers. Real designs need real calculations with your specific stackup and constraints.
Thermal Vias: When Traces Aren't Enough
Sometimes you can't make a trace wide enough — maybe it needs to route between fine-pitch components, or it's on an inner layer. That's where thermal vias come in.
Thermal vias are plain plated-through vias placed along a high-current trace or under a power component pad. They conduct heat from one layer to another, letting you spread the thermal load across multiple copper layers.
Via Current Capacity
A single standard via (10 mil drill, 1 oz plating) can carry roughly 1–2A depending on your temperature rise budget. For higher currents, you use arrays:
| Current | Via Count (10 mil drill) | Notes |
|---|---|---|
| 3A | 2–3 vias | Minimum for reliability |
| 5A | 4–5 vias | Space evenly along trace |
| 10A | 8–10 vias | Consider larger drill size |
| 20A | 15–20 vias | Use multiple rows |
Via-in-pad is common for power components like MOSFETs and voltage regulators. Place 4–9 vias directly under the thermal pad, and they pull heat into the ground or power plane below.
Via Spacing
Don't cluster all your vias in one spot. Space them along the current path so heat gets distributed. A good rule of thumb: place vias every 200–500 mils along a high-current trace, and use a ring of vias under component thermal pads.
Copper Pours and Planes
For the highest current paths — battery connections, motor drives, main power rails — use copper pours or dedicated power planes rather than traces.
A copper pour on an outer layer with 2 oz copper gives you a massive cross-sectional area. Even a 10mm wide pour on 2 oz copper handles 20+ amps comfortably. And if you tie it to inner planes with thermal vias, you get the benefit of multiple layers conducting in parallel.
Tips for copper pours on power paths:
- Avoid narrow necks where the pour gets pinched between components
- Use 2 oz copper for outer-layer power pours when current exceeds 10A
- Stitch pours to internal planes with via arrays every 250–500 mils
- Keep solder mask off high-current pads if you plan to add solder to increase cross-section (common in hand assembly)
Derating for Real-World Conditions
Everything we've discussed assumes a nominal 25°C ambient and still air. Real products operate in worse conditions:
- Enclosed enclosures can trap heat, raising effective ambient 15–30°C above room temperature
- High ambient environments (industrial, automotive underhood) may specify 85°C or 105°C ambient
- Altitude above 5,000 feet reduces convection cooling noticeably
- Adjacent heat-generating components raise local board temperature
Rule of thumb: Derate your trace current capacity by 20–30% for enclosed designs, and more for harsh environments. If IPC-2221 says your trace can handle 10A, design for 7–8A max if the board lives in a sealed plastic box.
Temperature Rise Budget
Choose your ΔT carefully. A 10°C rise is conservative and safe for most commercial products. 20°C is acceptable for many industrial designs. Going above 30°C rise means you're running hot — make sure nothing else on the board is temperature-sensitive nearby.
For FR-4 substrates, keep trace temperatures below 105°C to stay well clear of Tg (glass transition temperature). For high-Tg FR-4 (Tg ≈ 170°C), you have more headroom, but the copper and components may still be the limiting factor.
Heavy Copper: When 1 oz Isn't Enough
Standard PCB copper is 1 oz (1.4 mils / 35μm thick). For high-current boards, you can specify:
| Copper Weight | Thickness (mils) | Typical Use |
|---|---|---|
| 0.5 oz | 0.7 | Signal layers |
| 1 oz | 1.4 | General purpose |
| 2 oz | 2.8 | Power traces, motor drives |
| 3 oz | 4.2 | High-current bus bars |
| 4 oz | 5.6 | Extreme power applications |
Going from 1 oz to 2 oz copper effectively doubles your current capacity for the same trace width. It also costs more — typically 15–30% premium per layer, depending on your fab. But it's cheaper than a redesign after your board burns up in testing.
Practical Design Checklist
Before you finalize any high-current PCB design:
- Calculate trace widths using IPC-2221 (conservative) or IPC-2152 (optimized)
- Run high-current paths on outer layers when possible
- Use thermal vias under power component pads and along long traces
- Add copper pours for anything over 10A
- Derate for your actual operating environment
- Check for thermal bottlenecks — narrow sections, long inner-layer runs
- Verify your copper weight specification in the fab notes
- Simulate or measure prototype temperatures before production
Skip the Manual Math
The formulas work, but nobody wants to crunch A = [I / (k × ΔT^0.44)]^(1/0.725) by hand for every trace on a board. The PCB Trace Width Calculator at semiconductor.tools handles both IPC-2221 and IPC-2152 calculations instantly. Plug in your current, copper weight, and temperature rise — get your trace width for internal and external layers, plus resistance and voltage drop at length. It runs in your browser, no sign-up needed.
Want to stop guessing on trace widths? Try the PCB Trace Width Calculator — it uses the same IPC-2221 and IPC-2152 formulas covered here, handles internal and external layers, and gives you resistance and voltage drop at any trace length. Free, fast, no account required.