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April 28, 20269 min readBy Lora Neumann

FPGA Selection Guide for Hardware Startups: Balancing Cost, Performance, and Speed

# FPGA Selection Guide for Hardware Startups: Balancing Cost, Performance, and Speed You're a hardware startup.

You're a hardware startup. You've decided an FPGA is the right choice for your product — maybe you need real-time processing, custom parallelism, or interface flexibility that no MCU can give you. Now comes the hard part: which one?

This isn't a theoretical comparison. This is the practical guide I wish someone had handed me when I was picking FPGAs for my first startup product. We'll talk about real costs (not just the chip price), tooling headaches, and the hidden gotchas that burn time and money.

The Three-Way Decision

For startups, FPGA selection comes down to three things:

  1. Cost — BOM cost at volume, but also dev tools, IP licenses, and programmer hardware
  2. Performance — Logic density, I/O speed, and whether the architecture fits your algorithm
  3. Speed to market — How fast can you go from "hello world" to a working prototype?

The catch? These three are usually in tension. The cheapest FPGA might take twice as long to develop for. The fastest time-to-market option might cost $30 per chip at volume. Let's break down what each vendor offers.

The Contenders: What Startups Actually Use

Lattice (iCE40 and MachXO2/3/5)

Lattice has become the darling of the open-source FPGA world, and for good reason.

Why startups love Lattice:

  • iCE40 family — fully supported by open-source toolchain (Project IceStorm / Yosys / nextpnr). Zero license fees. You can build and flash from a Linux command line.
  • MachXO3 — instant-on (microseconds), non-volatile config, good for control plane and glue logic. No external flash needed.
  • MachXO5 — newer, with hardened PCIe and DSP blocks. Targets the mid-range gap between iCE40 and bigger families.
  • Low power — iCE40 UltraPlus draws ~30µA in standby. Great for battery-powered or energy-harvesting designs.
  • Small packages — QFN packages down to 1.4mm x 1.4mm. Fits on tiny boards.

The trade-offs:

  • Logic density is modest (up to ~8K LUTs on iCE40, ~44K on CrossLink-NX)
  • No hard memory controllers or high-speed transceivers on the smaller families
  • Lattice Diamond (their commercial tool) is free but feels like software from 2005
  • Limited DSP resources compared to Xilinx/Intel

Best for: IoT edge devices, sensor fusion, MIPI bridging, control logic, anything where you need a little FPGA without the heavy toolchain overhead.

AMD/Xilinx (Spartan, Artix, Kintex)

Xilinx (now AMD) has the broadest FPGA portfolio. For startups, the sweet spots are Spartan 7 and Artix 7.

Family Logic Cells DSP Slices Transceivers Approx. Price (1K qty)
Spartan-7 6K–102K 20–160 None $5–$25
Artix-7 16K–356K 40–740 Up to 16 (6.6 Gb/s) $12–$60
Kintex-7 71K–480K 120–1920 Up to 32 (12.5 Gb/s) $25–$200

Why startups choose Xilinx:

  • Massive ecosystem. More IP cores, more app notes, more Stack Overflow answers than any other vendor.
  • Vivado MLSD edition is free for devices up to Kintex-7 (and some UltraScale). This covers most startup needs.
  • Artix-7 hits a nice sweet spot — enough DSP and BRAM for signal processing, transceivers for high-speed I/O, and prices that work at moderate volumes.
  • MicroBlaze soft processor lets you embed a CPU in the FPGA if you need both firmware and hardware acceleration.

The trade-offs:

  • Vivado is... an experience. It's slow to build, uses tons of RAM, and the UI can be frustrating. Budget for a dev machine with 32GB+ RAM.
  • No instant-on. Configuration from external flash takes tens to hundreds of milliseconds. If your product needs sub-millisecond boot, look elsewhere.
  • Power consumption is higher than Lattice, especially during configuration.

Best for: Signal processing, motor control, vision processing, any design that needs DSP slices and moderate-speed transceivers.

Intel/Altera (Cyclone, MAX 10)

Intel's FPGA lineup (formerly Altera) competes directly with Xilinx's mid-range.

Family Logic Elements DSP Blocks Transceivers Approx. Price (1K qty)
MAX 10 2K–50K 12–144 None $3–$20
Cyclone 10 GX 30K–220K 84–560 Up to 16 (12.5 Gb/s) $15–$80
Cyclone 10 LP 6K–50K 30–240 None $5–$20

Why startups choose Intel/Altera:

  • MAX 10 has integrated flash — no external configuration device needed. Instant-on in dual-supply mode. This alone can save board space and BOM cost.
  • Intel Quartus Prime Lite is free and covers Cyclone and MAX families.
  • Nios II soft processor — similar concept to MicroBlaze, runs inside the FPGA.
  • Good DSP density on Cyclone 10 GX for the price.

The trade-offs:

  • The Intel FPGA group has had organizational instability. Long-term roadmap confidence is... uncertain.
  • Quartus Prime Lite works fine but IP catalog is limited compared to the full version.
  • Developer community is smaller than Xilinx's. Fewer tutorials, fewer answered questions.

Best for: Designs where integrated flash saves BOM complexity, cost-sensitive DSP applications, and teams with existing Altera experience.

The Real Cost: It's Not Just the Chip

Here's what most first-time FPGA startup founders miss: the chip cost is maybe 30% of the total FPGA cost picture.

Cost Category Lattice iCE40 Xilinx Artix-7 Intel MAX 10
Chip (1K qty, mid-range) $3–$8 $15–$35 $5–$15
Dev tools Free (open-source) or free (Diamond) Free (Vivado MLSD) Free (Quartus Lite)
Dev board $20–$50 $50–$200 $30–$100
JTAG programmer $10 (FT2232 board) $50 (Diligent) or $10 (clone) $30 (USB-Blaster clone)
IP license (if needed) $0 (limited IP) $0–$10K/year $0–$10K/year
External flash $0.20–$0.50 $0.50–$1.00 $0 (integrated in MAX 10)

The hidden costs:

  • PCB complexity. FPGAs need multiple power rails (core, I/O, transceiver), decoupling caps, and often a configuration flash. Your PCB cost goes up.
  • Verification time. FPGA development is slower than firmware. Simulation, timing closure, and verification can eat weeks. Budget for it.
  • Hiring. Good FPGA engineers are expensive and scarce. If you're the founder doing FPGA work, factor in your own time.

A Decision Framework

Ask yourself these questions, in this order:

1. Do you actually need an FPGA?

Seriously. If your problem can be solved with a fast MCU (Cortex-M7 at 600MHz) or a dedicated ASIC, go that route. FPGAs add complexity, cost, and development time. Only use one when you need:

  • Deterministic, sub-microsecond timing
  • Massive parallelism (processing 16 data streams simultaneously)
  • Custom high-speed interfaces not available in MCUs
  • Field-upgradable hardware

2. How much logic do you need?

Be honest. Most first-time FPGA designers overestimate their logic needs by 3-5x. Start with a smaller, cheaper device and prototype your design. You can always size up later.

Application Typical LUT Count Recommended Family
Glue logic, I/O expansion 500–2K iCE40, MAX 10
Sensor fusion, protocol bridging 2K–8K iCE40 UltraPlus, MachXO3
Motor control, basic DSP 5K–20K Spartan-7, Cyclone 10 LP
Vision processing, SDR 20K–100K Artix-7, Cyclone 10 GX
Video processing, radar 100K+ Kintex-7, Cyclone 10 GX

3. Do you need high-speed transceivers?

If yes, your choices narrow significantly. Lattice iCE40 is out. You're looking at Artix-7, Cyclone 10 GX, or MachXO5 (limited transceiver options).

4. What's your production volume?

Volume Strategy
< 100 units Pick whatever dev board is cheapest. Use the FPGA on the dev board.
100–1K Choose based on dev tool comfort. Chip cost matters but isn't dominant.
1K–10K Chip cost and availability matter. Get quotes from distributors early.
10K+ Negotiate direct with vendor FAEs. Consider ASICS for the future.

5. What's your team's experience?

Use what your team knows. If your lead engineer has 5 years of Vivado experience, switching to Quartus because MAX 10 saves $3 per chip will cost you weeks of ramp-up time. That's almost never worth it at startup volumes.

Practical Tips from the Trenches

  • Buy two of every dev board. You'll brick one. It happens to everyone.
  • Start with the vendor's reference design. Don't build your own PLL configuration from scratch. Take their example, modify it.
  • Use version control for everything. HDL, constraints, synthesis scripts, testbenches. All of it in git.
  • Simulate early and often. Watching a real FPGA do the wrong thing on a scope is 10x harder than catching it in simulation.
  • Lock your pin assignments before routing the PCB. Changing pin assignments after the board is fabricated means a board respin.
  • Check supply chain availability before you commit. In 2023-2024, lead times on some Xilinx parts stretched to 50+ weeks. Check Octopart and your distributor before designing in a specific part number.

Example: Choosing an FPGA for a Drone Flight Controller

Let's walk through a real decision.

Requirements:

  • 6 PWM outputs for motor control (sub-µs jitter)
  • IMU sensor fusion (3-axis accel + gyro + mag)
  • Optical flow processing (80x80 pixels at 50fps)
  • UART + SPI peripherals
  • < 2W power budget
  • Target volume: 500 units/year

Analysis:

The optical flow processing needs maybe 5K LUTs and a few multipliers. The sensor fusion is another 2-3K LUTs. PWM generation is trivial. Total: ~10K LUTs.

Candidates:

Device LUTs DSP Power Price (500 qty) Decision
iCE40 UP5K 5.3K 8 ~30mW $4 Too small for optical flow
MachXO3-6900 6.9K 0 ~100mW $5 No DSP, marginal LUTs
iCE40 UltraPlus (8K) 7.7K 8 ~50mW $6 Tight but doable with optimization
Spartan-7 S25 23.5K 80 ~300mW $10 Comfortable margin, more power

Given the 2W budget and the desire for open-source toolchain, iCE40 UltraPlus 8K is the winner — if you're willing to optimize aggressively. If you want more breathing room and can accept the power draw, Spartan-7 S25 gives you a much more comfortable development experience.

Resources

  • Project IceStorm (clifford.at/icestorm/) — Open-source toolchain for Lattice iCE40
  • Yosys + nextpnr — Open-source synthesis and place-and-route
  • AMD/Xilinx Vivado MLSD — Free for 7-series up to Kintex
  • Intel Quartus Prime Lite — Free for Cyclone and MAX families
  • fpga4fun.com — Tutorials for beginners
  • r/FPGA — Active community, good for specific questions

Not sure which FPGA fits your design? Try the FPGA Selection Finder — enter your LUT budget, I/O requirements, and target price, and it filters the entire market to show you what actually matches.