You just got your board back from the EMC lab and it failed. Again. Another spin, another $5K-$15K in test fees, another two weeks of schedule slip. EMC failures are one of the most frustrating parts of hardware development because the problems are usually simple in hindsight — but invisible until you test.
Here are the 10 mistakes I see most often in boards that fail EMC, and what to do about each one.
1. No Solid Ground Plane
This is the #1 cause of EMC problems, and the easiest to fix.
A continuous ground plane provides a low-impedance return path for every signal on your board. When you slot your ground plane with traces, or split it into islands, return currents have to find alternative paths — and those alternative paths create large current loops that act as antennas.
The fix: Dedicate an entire layer to ground. Don't route traces on it. Don't split it unless you have an extremely good reason (and "someone told me to split analog and digital ground" is not a good reason in 99% of cases). Modern mixed-signal ICs like ADCs and DACs are designed to work with a single unified ground plane.
The exception: If you're dealing with truly high voltages (mains, motor drives) you may need galvanic isolation. That's a different situation requiring a different approach (optocouplers, digital isolators, isolated power supplies).
2. Signals Crossing Ground Plane Splits
Even if you have a solid ground plane, routing a high-speed signal across a split or gap forces the return current to detour around the obstruction. That detour creates a slot antenna that radiates beautifully at harmonics of your signal frequency.
The fix: Keep high-speed signals (clocks, USB, HDMI, SPI, any edge rate faster than ~1 ns) away from ground plane voids. If a signal must cross a gap, place a stitching capacitor (0.01-0.1 µF) across the gap near the crossing point to provide a return path for high-frequency currents.
3. Inadequate Decoupling
Every IC needs local charge storage to supply transient current during switching events. Without it, current pulses travel across the board through power traces and their parasitic inductance, creating voltage spikes and radiated emissions.
The fix:
- Place a 0.1 µF ceramic capacitor within 5mm of every power pin
- Add a 1-10 µF tantalum or ceramic capacitor per power rail per IC
- Add a 10-100 µF bulk capacitor at the board power entry
- Use multiple capacitor values in parallel (0.01 µF + 0.1 µF + 1 µF) to cover different frequency ranges
The placement matters more than the value. A 0.1 µF cap 20mm from the power pin is less effective than a 0.01 µF cap right next to it.
Decoupling Capacitor Placement
| Capacitor Value | Range | Max Distance from Pin |
|---|---|---|
| 0.01 µF | Very high frequency | < 3mm |
| 0.1 µF | High frequency | < 5mm |
| 1 µF | Medium frequency | < 15mm |
| 10-100 µF | Low frequency / bulk | Near power entry |
4. Clock Traces Routed Without Care
Clock signals are the worst EMC offenders because they're periodic — all the energy concentrates at the fundamental frequency and its harmonics. A 48 MHz clock has strong harmonics at 96, 144, 192, 240 MHz and beyond.
The fix:
- Route clock traces on internal layers between ground planes (stripline topology) when possible
- If clocks must be on outer layers, keep them short and away from board edges
- Don't route clocks near connectors (they can couple to cables, turning them into antennas)
- Use series termination resistors (22-33Ω) near the source to slow edge rates
- Match lengths on differential clock pairs
5. Poor Via Transition Strategy
Every time a signal changes layers through a via, its return current has to transition too. If the return path on the new layer is far from the via, you get a localized impedance discontinuity and radiation.
The fix: Place a ground via (a via connected to the ground plane) within 2-3mm of every signal via. This gives the return current a nearby path to transition between reference planes.
For high-speed signals (USB 3.0, PCIe, HDMI), this is non-negotiable. Use via stitching — multiple ground vias surrounding each signal via pair.
6. Traces Too Close to Board Edges
Traces near the edge of a PCB can couple energy to the chassis, nearby cables, or other boards. The ground plane also loses effectiveness at board edges because the plane is truncated.
The fix: Keep all traces at least 20 mils (0.5mm) from the board edge. Keep high-speed traces at least 50 mils (1.25mm) from the edge. Ground plane copper should extend closer to the edge than signal traces to provide shielding.
7. No Common-Mode Chokes on External Cables
Cables are the most efficient antennas on your board. Any common-mode noise on an I/O cable gets radiated with terrifying efficiency. USB, Ethernet, HDMI — any cable leaving the board needs common-mode filtering.
The fix: Place common-mode chokes on:
- USB — Murata DLW21S or equivalent, right at the connector
- Ethernet — Most RJ45 jacks with integrated magnetics include common-mode chokes
- HDMI/DisplayPort — Common-mode chokes in the signal path near the connector
- Power cables — Ferrite beads or clamp-on cores if needed
This single fix resolves more conducted and radiated emissions failures than anything else on this list.
8. Forgetting About Crystals and Oscillators
Crystal oscillators run at high frequencies (8-50 MHz typical) and their harmonics can be surprisingly strong. The crystal pins are high-impedance nodes that pick up noise easily.
The fix:
- Keep crystal traces short and symmetrical
- Surround the crystal with a ground guard trace or copper pour
- Don't route any signal traces under the crystal (even on other layers)
- Place the load capacitors right next to the crystal pins
- If using a MEMS oscillator instead of a crystal, the same rules apply
9. Power Plane Resonance
Large, unbroken power planes can resonate at frequencies determined by the board dimensions. A 10cm × 10cm board can have plane resonances starting around 750 MHz — right in the range where many EMC tests look.
The fix:
- Use multiple decoupling capacitors distributed across the board (not clustered near the power supply)
- Add stitching vias between ground planes at regular intervals around the board perimeter
- For large boards, consider burying a grid of decoupling capacitors across the power/ground plane pair
This is mainly a concern for boards larger than ~5cm × 5cm. Small boards rarely hit this problem.
10. Ignoring Cable Shield Termination
If your design uses shielded cables (USB, HDMI, coax), the shield termination matters enormously for EMC. A shield that's connected through a long, inductive trace might as well not be connected at all at high frequencies.
The fix:
- Connect cable shields to chassis ground, not signal ground, at the connector
- Use the shortest possible connection — direct via to the chassis ground plane
- Avoid "pigtail" shield connections (a wire from the shield to ground) — these are inductive and ineffective above ~10 MHz
- Use 360° shield termination (connector shells that make circumferential contact) when possible
Pre-Compliance Testing: Catch Problems Early
You don't need a $100K EMC chamber to find these problems before you send your board to the lab. Some inexpensive tools:
- Near-field probe set ($50-$200) — sniff around your board to find radiation hotspots
- Spectrum analyzer ($300-$1000 for a used unit or SDR-based analyzer) — see what frequencies your board is emitting
- LISN (Line Impedance Stabilization Network) — measure conducted emissions on power lines
- Oscilloscope with FFT — check power rail noise and clock signal quality
A day of pre-compliance testing can save you a week of failed lab visits. Find the hotspots, fix them, then go to the lab with confidence.
EMC Design Checklist
Run through this before sending your board to layout review:
- Continuous ground plane on at least one layer
- No ground plane splits under high-speed signals
- Decoupling caps placed within 5mm of all power pins
- Clock traces routed on inner layers or kept short
- Ground vias placed next to every signal via
- No traces within 20 mils of board edge
- Common-mode chokes on all external cable interfaces
- Crystal/oscillator guard traces and short connections
- Shield connections are short and direct
- Board stackup reviewed for impedance control
Relevant Standards
- CISPR 32 / EN 55032 — Radiated and conducted emissions for multimedia equipment (the most common EMC standard for commercial products)
- CISPR 35 / EN 55035 — Immunity requirements
- FCC Part 15 — EMC requirements for the US market
- IEC 61000-4-2 — ESD immunity testing
- IEC 61000-4-3 — Radiated RF immunity testing
If you're selling in the EU, you need CE marking under the EMC Directive (2014/30/EU). In the US, FCC Part 15 Class B for residential environments, Class A for industrial.
The Most Important Rule
Fix EMC problems at the source, not with band-aids. Ferrite clamps on cables and copper tape on enclosures are emergency fixes, not design solutions. If your board has a solid ground plane, proper decoupling, and clean trace routing, it will pass EMC testing the first time. Most of the fixes in this list cost nothing in production — they're just good design practice.
Designing a board and need to check your trace widths for current-carrying capacity? Use the PCB Trace Width Calculator to make sure your power traces are sized correctly — because an undersized power trace doesn't just fail EMC, it can literally burn your board.